(1) Vendor needs to provide QuestaSim tool license software. – Development of memory device characterization platform requires a QuestaSim simulation and verification tool to simulate the Hardware Description Language (HDL) code written for Field Programmable Gate Arrays (FPGA). – This tool will enable the FPGA developer to develop the HDL design for the Memory Device Characterization platform with greater accuracy by emulating the behavior and exercising the design with various constraints before it is implemented in the real hardware. – The tool shall provide mixed language (VHDL, Verilog, System Verilog) simulation support seamlessly. – Tool shall support Unified Verification Methodology capabilities. – The tool shall simulate functional and behavioral models. – Tool shall provide libraries for Intel, Xilinx, and Microsemi FPGAs. – Tool shall provide a minimum of 6x speed compared to the integrated Vivado simulator. – It is necessary to maintain the accuracy in the design functionality to prevent any damage to the memory device and provide error–free benchmarking of the memory device. – Purchasing this tool license for the year 2025 is crucial to designing a robust memory characterization platform, as the results collected from the first phase will serve as a guidepost for the final deliverable, a cost–effective testbed for expediting innovation in emerging memory technologies, which promise long–term advantage for the semiconductor industry. (2) The contract period will be for one year.